Creating Multimedia Future Today
First ever FPGA implementation of Dolby Digital Professional Encoder based on SideWorks technology
For the first time ever, multi-channel Dolby Digital professional encoding is available on field programmable gate arrays (FPGAs). This capability has been implemented on Xilinx® Virtex®-5 devices, providing broadcast equipment developers with the flexibility to adapt to rapidly evolving design requirements for higher performance, lower power systems, and a simplified bill of materials to reduce costs.

Live demonstrations of the first fully certified Dolby Digital Professional Encoder on Xilinx FPGAs are being held at the IBC2009 Exhibition in Amsterdam from September 11th through 15th in Xilinx Booth #10.B30.

Dolby Digital Professional Encoder on Xilinx FPGAs

Dolby Digital is one of the leading audio codecs, mandated in many standards and widely deployed in professional and consumer products worldwide. While FPGAs are commonly used in professional products for audio and video processing, until now Dolby Digital professional encoding was only licensed on conventional digital signal processing (DSP) devices. By making this capability available on FPGAs, broadcast system developers have both the digital signal processing (DSP) technology and massive parallel processing capacity to handle multiple channels for even the most complex and demanding audio and video processing functions required by professional encoders, transcoders, decoders, cameras, switches and routers, and editing systems.

By offering Dolby Digital and other audio codec technology in FPGAs, we provide broadcast system developers with the unprecedented ability to perform extremely dense multi-channel encoding, decoding, and transcoding of audio and video together in a single design.


The SideWorksTM technology enabled it

Being a complex algorithm, a hardware only implementation in FPGA of the Dolby Digital Professional Encoder is not practical. This is a control rich algorithm, best implemented in a processor, aggravated by the fact it needs many DSP capabilities.

A purely hardware implementation would meet the performance requirements but the circuit would be too big, and take a long time to develop. Such implementation would not make economical sense because the customer would need to pay for a large FPGA device, several times more expensive than a DSP chip.

One solution would be to map a DSP core onto the FPGA fabric and port the software to the mapped DSP core. Unfortunately, this solution would hardly meet performance, as the FPGA mapped DSP would consume many of the FPGA resources and run at a lower frequency than required.

Having this in mind Coreworks decided to have a mixed and totally owned solution: a general purpose CPU (FireWorks) coupled with a reconfigurable accelerator (SideWorks). The general purpose CPU provides the ability to implement complex control structures, while the reconfigurable accelerator provides the performance of hardware while keeping the flexibility of software. The fact it is "reconfigurable" is key: the same engine can dynamically morph into the various accelerators needed by the algorithm without consuming too many of the FPGA hardware resources. In fact customers  are providing very positive feedback on the frugal use of FPGA resources that our technology enables.

During verification and validation the use of our FaceWorksTM technology as a high-speed networked debug stub was also key to achieving accurate results in a short time to market.

Coreworks has now heavy technology infrastructure in place, such as the SideWorks and FaceWorks technologies, which will make it much easier to implement the next codecs. In this quarter, implementations of MPEG1 layers I/II encode and decode, and Dolby Digital decoding will be released. Dolby E encode and decode functions will follow suit, as well as AAC and HE-AAC. The objective is to build a multi-standard audio offload engine.

Our technology can also be ported to ASICs, ASSPs or SoCs. Traditionally Coreworks has been providing complex logic designs at the RTL level, and now also offers software object code along with the RTL, so that true technology independence is achieved.

Close dropdown
© Copyright 2004-2018 Coreworks S.A. All rights reserved. [Last updated Oct 02, 2017] - Website terms of use